1 : in a leadless chip carrier or land grid array package, the metallized areas on the bottom of the package that provide contact points between the internal metal traces and connecting external circuitry. They are also used as electrical test pads. [SEMI G5-87] 2 : in packages with brazed leads or pins, such as leaded chip carriers, pin grid arrays and sidebrazed dual inline packages, the pads to which the leads are brazed. [SEMI G39-89] Also see ceramic chip carrier and pin grid array.
Search the Dictionary
